Quantum computer systems use quantum bits for data processing and storage. Qubits can exist as both zero and one concurrently, in contrast to digital bits used in conventional computing. They can also be entangled with one another quantum mechanically to do computations not possible with traditional computers.
As a result, complicated computations can be completed by quantum computers quickly. According to earlier reports, quantum computers could finish calculations that would have taken over four decades for classical computers. But the quick speed of computation also has a disadvantage. It makes mistakes that need to be fixed. This has significantly hampered the adoption of quantum computers.
Portable Quantum Computers – Latest Research
Using low-density parity-check (LDPC) codes on cat qubits, Alice & Bob have reported a new quantum error correction architecture. The new design by the French startup may run Shor’s algorithm with less than 100,000 physical qubits. The method advances the way to effective quantum computation with error-corrected, logical qubits. It shows the company’s dedication to making portable quantum computers more practical.
According to prior studies it takes 1,000 physical qubits to create a dependable, error-free logical qubit. But running an algorithm like Shor’s at this size would consequently require 20 million qubits. This makes quantum computing impractical for widespread use by increasing the infrastructure needed.
The research objective has been to produce error-free logical qubits by minimizing the number of physical qubits needed. Correcting phase-flips or a one-dimensional error correction code is one method. Previous work by researchers has shown that this method might increase Shor’s algorithm by a factor of 60. Thereby, reducing the number of physical qubits needed to perform it to 350,000.
Researchers have employed low-density parity checks (LDPC) as an alternative method. This set of error correction algorithms lowers hardware requirements to rectify errors in information transport and sharing. Currently, scientists at Alice & Bob have integrated these two methods to accomplish a novel achievement in quantum computing.
The potential of quantum computing is mostly dependent on robust error correction. Alice’s and Bob’s combined breakthroughs could yield industry-relevant logical qubits on current mature hardware technology, increasing correction by many degrees.
A technique for lowering the overhead of fault-tolerant quantum computing (FTQC) systems is quantum low-density parity-check (qLDPC) codes. However, the hardware implementation of these codes into portable quantum computers requires cutting-edge technologies. They include multi-layered chip architectures, high-weight stabilizers, or long-range qubit communication. Alternatively, one can use bosonic cat qubits to lower the hardware burden of fault tolerance. Their bit-flip errors are exponentially suppressed by design.
Mitigating Through The Error
Alice & Bob present an architecture that corrects for phase flips using cat qubits concatenated in classical LDPC codes. According to scientists, adopting such phase-flip LDPC codes has two main benefits. One can easily implement the same on hardware using low-weight stabilizers and short-range qubit interactions in 2D. It is compatible with existing superconducting circuit technology.
Real-world implementation of the method on portable quantum computers through chip demonstration is a crucial next step. The company unveiled a 16-qubit Helium 1 quantum processing unit (QPU) as a prototype. It is their first logical error-corrected prototype. One that is predicted to improve the error rates of portable quantum computers with each additional qubit.